With the increasing demand for consumer electronic functions, HDMI is increasingly being applied to consumer electronics as a new generation of digital audio and video interfaces. A large number of electronic products with HDMI function have come out, and the number of HDMI interfaces has also increased. As a carrier of audio and video performance, digital TV is mainly used as the receiving end of digital audio and video data. In order to connect digital TVs to more HDMI devices, many IC design companies have introduced three-to-one or four-choice HDMI switches in time to meet the needs of multiple interfaces at the HDMI receiver. This article mainly introduces the application design of a three-select HDMI switch PS321 based on Parade.
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hardware design
1 chip selection
As a three-in-one HDMI switch, the PS321 has many advantages over similar products from other manufacturers. The PS321 is compared with another universal three-select HDMI switch. The results are shown in Table 1.
It can be seen from the above comparison that the PS321 has the following advantages.
â— Advantages in data transmission rate, HDMI line transmission distance, energy saving, and ESD (anti-static);
â— Support I2C control for designers to use;
â— Built-in EDID cache, eliminating the need to add E2PROM for storing EDID data on the HDMI interface, thus reducing circuit cost;
â— Built-in equalizer, adjustable gain, used to compensate for transmission loss of HDMI signal on the line.
2 circuit design 1DDC interface circuit design
The DDC (Display Data Channel) is mainly used for the exchange of EDID data and HDCP keys between the HDMI source device (Source) and the sink device (Sink). Through EDID communication, the source device can learn the receiving capability of the audio and video of the receiving device. Through the communication of the HDCP Key, the content protection and authentication of the data stream can be performed in real time, thereby achieving the purpose of data content protection. The circuit mode of the DDC is the same as that of the I2C circuit, so in the DDC circuit design, the designer must consider the level of the DDC line. According to the HDMI 1.3a specification, the pull-up resistor of the HDMI source DDC is at least 1.5kΩ. Considering the DDC level requirement in HDMI authentication (between 4.5 and 5.5V), the DDC signal is pulled up through a 10kΩ resistor to The 18th pin of the HDMI interface (the HDMI source 5V power supply) is shown in Figure 1. After calculation, the minimum value of the total pull-up resistor of the DDC at the source and the receiver is R total pull-up min = 1.5kΩ ‖ 10kΩ = 1.3kΩ. After testing, the level of the receiving DDC is about 4.68V, so it meets the HDMI certification requirements; and the minimum value of the DDC total pull-up resistor of 1.3kΩ also meets the I2C specification.
Figure 1 DDC interface circuit diagram
Since there is a weak pull-up inside the DDC of the PS321, when the HDMI interface is not connected to the HDMI source device, the pull-up level inside the DDC is transmitted to the 18th pin of the HDMI interface through a 10kΩ resistor, resulting in the 18th pin of the HDMI interface. The level is greater than 1.5V and does not meet the HDMI certification requirements. Therefore, it is necessary to connect this pin of the HDMI interface to a 3.6kΩ resistor to ground. After testing, when the HDMI interface is not connected to the HDMI source device, the 18th pin level of the HDMI interface is about 0.5V, which satisfies the HDMI certification requirements.
2 Equalizer design The equalizer design is mainly to do the necessary signal shaping for weak signals to ensure the integrity of HDMI data transmission. In the I2C mode of operation, the gain of the equalizer can be set by a register. The equalizer gain sizes of the three HDMI input ports can be adjusted separately, as shown in Table 2. Designers can decide which block to use by losing the signal on the three HDMI input ports.
Perform the following test: Prepare two HDMI cables, one long 5m long and one long 10m long. Also transmit the signal of 2.25Gb/s data rate when the equalizer gain is the default value, and get the data eye diagram shown in Figure 2. . By comparison, the area of ​​the transmission eye of 10 m long is smaller than 5 m, but it does not affect the integrity of the transmitted signal. When designing an equalizer design, the designer needs to determine the strength of the signal to determine which gain to use. At present, there is a need in the TV design to require a side HDMI interface, and the HDMI switch is usually on the motherboard, a distance from the side HDMI interface. Of course, this distance will generally not exceed 1m. Using a standard HDMI cable will not affect the signal quality, but if you use a normal cable, it may cause signal distortion. At this time, it is necessary to appropriately increase the gain of the equalizer to ensure the integrity of signal transmission. As shown in Figure 3. The left side is the transmission signal of the ordinary connection line collected by the PS321 input terminal. It can be seen that the area of ​​the eye diagram becomes smaller and the loss of the signal is large; the right side is the transmission signal collected after the gain of the equalizer is increased by the PS321, and the signal can be seen. Restore integrity after shaping.
Figure 2 Transmission eye diagram of 2.25Gb/s data rate
Figure 3 Improve the gain of the equalizer to ensure the integrity of the signal transmission
3TMDS signal PCB design
The HDMI data stream is transmitted as a TMDS signal, including three pairs of differential data lines and a pair of differential clock lines. According to the HDMI 1.3a specification, the differential impedance of the TMDS is required to be 100 Ω ± 15%. If you design according to two layers of PCB, as shown in Figure 4. It is calculated that the thickness of the two-layer PCB is 61.2+1.9 +1.9=65 mil, which is about 1.6 mm; the dielectric constant of the PCB sheet is 4.2. According to the target requirement of TMDS differential impedance of 100Ω, the above parameters are put into the differential impedance calculation software Polar Si9000, and the guiding parameters of PCB design will be obtained, as shown in Figure 5.
Figure 4 Double-layer PCB architecture
Figure 5 Differential impedance calculation
The following PCB design parameters can be derived from Figure 5: differential trace width of 12.5 mils; differential line spacing of 5 mils; differential impedance of approximately 100 Ω.
software design
1 HPD operation design
The HPD (Hotplug Hot Plug) operation design is an important part of the HDMI interface software design. It is an intro signal sent by the receiving device (Sink) to establish formal communication with the HDMI source device (Source). When the HPD signal level is high, it indicates that the receiving device is ready, allowing the source device to access the receiving device.
In the software design of HPD operations, the following two factors should be considered.
The first is the detection of the power pin (the 18th pin of the HDMI receiving socket) output by the HDMI source device. If the 18th pin of the HDMI receiving socket is low, indicating that the HDMI source device is not ready, the receiving device should set the HPD signal low; if the 18th pin of the HDMI receiving socket is high The level indicates that the HDMI source device is ready. At this time, the receiving device can selectively set the HPD signal to a high level according to its own situation to notify the HDMI source device, indicating that the receiving device is also ready.
The second is the simulated HPD operation under the failure of the source and receiver communication. When the communication between the HDMI source and the receiving end is just established, the HDCP-KEY reading failure or the EDID data reading error may occur, causing the HDMI to work abnormally. In order to resume normal communication, a simulated HPD operation is required, that is, The HPD signal is pulled from the high level to the low level by the receiving device, the HPD low level lasts for about 100ms, and then pulled back to the high level, so that the source device detects the jump of the HPD signal and re-initiates the read operation. Make further attempts to establish normal communication. This software emulates the operation of the HPD to reconstruct the normal communication of the HDMI in an analog hard-plug manner without the assistance of human hot plug operation, thereby eliminating the malfunction caused by the unstable communication. Taking into account the above two factors, the designer can easily grasp the software design process of HPD operation, as shown in Figure 6.
Figure 6 Software design flow for HPD operations
2 CEC operation design
CEC (Consumer Electronics Control) operation is an important extension of the HDMI interface. It uses "One Wire" communication to connect HDMI devices and simplify operation between HDMI devices. If the PS321 is configured with the built-in EDID buffer, the CEC operation design of the PS321 is mainly the allocation of the CEC physical address, as shown in Figure 7.
Figure 7 CEC physical address allocation
There are two ways to allocate CEC physical addresses: hardware and software.
1Hardware mode When the HDMI receiving device is powered on, the system writes the EDID data including the physical address of HDMI port 1 to the EDID of PS321 through I2C.
The physical address of the buffer area and HDMI 3 ports is as follows: port 1 defaults to 1.0.0.0; physical addresses of port 2 and port 3 are set by PS321
The "automatic one-up" operation is implemented on the basis of the default address of port 1 in hardware, so port 2 is 2.0.0.0; port 3 is 3.0.0.0.
The physical address of the CEC obtained in hardware is fixed and cannot be changed, so the physical addresses of HDMI Port 2 and Port 3 cannot be changed.
The process of setting the CEC physical address in hardware mode is shown in Figure 8.
Figure 8 Flowchart for setting the CEC physical address in hardware mode
2 software mode
The physical address of HDMI port 1 comes from the EDID buffer area. The system writes the physical address of EDID data including HDMI port 1 to the EDI321 buffer area of ​​PS321 through I2C, which is the same as the hardware. The physical addresses of HDMI ports 2 and 3 are stored in dedicated registers that are mapped to the EDID buffer when called. The physical address of the CEC set in software can be changed. The reference flow code for setting the CEC physical address in software mode is as follows:
Set HPD Low
/ / Set the HPD signal to low level
WriteREG(Page0.0x10, 0x01)
/ / Activate the software mode to set the CEC physical address
Load EDID to PS321 EDID Buffer for HDMI1
/ / Write the EDID data including the physical address of HDMI port 1 into the EDID buffer
Load CEC Physical Address location to Page0.0x17
/ / Write the location of the CEC physical address to register 0x17
Load CEC Physical Address&checksum for HDMI2 to Page0.0x11~0x13
/ / HDMI2 physical address and check code written to the register 0x11 ~ 0x13
Load CEC Physical Address&checksum for HDMI3 to Page0.0x14~0x16
/ / HDMI3 physical address and check code written to the register 0x14 ~ 0x16
WriteREG(Page0.0x10, 0x07)
//EDED and CEC physical addresses of 3 HDMI ports are ready
Set HPD High
/ / Set the HPD signal to high level
Conclusion Through the application design of PS321, you can further understand the design points of HDMI switch in software and hardware design. With the extensive use of HDMI interfaces and the development of high-definition audio and video data streams, HDMI switches will develop more integrated and updated functional applications, such as TMDS signal adaptive equalization; HDMI-CEC command reception, decoding and transmission, etc. Features.
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