Electronic enthusiast network: This article mainly describes the main factors that determine the performance and power consumption of the ARM core MCU.
After ARM introduced the Cortex-M0+ core, its 32-bit MCU core has increased to four. Not long ago, NXP also announced the license of the Cortex-M0+ processor, becoming the only semiconductor manufacturer to offer the complete Cor tex-M0, Cortex-M0+, Cortex-M3 and Cor tex-M4 series core MCUs. In March of this year, Freescale also introduced the MCU KineTIs L series based on the ARM Cortex-M0+.
At the same time as the ARM core unifies the MCU process, how can each vendor make their products unique and outstanding? NJ Semiconductor's Jan Jaap Bezemer (Global Microcontroller Product Line Director) said that in addition to the kernel, Different resources can also reflect differences, such as memory, digital / analog IP. Bezemer said: "Some IPs are standard and some are not. NXP has spent a lot of time developing non-standard IPs in order to better configure these resources. In addition, the most important thing to note is that Reduce the power consumption of the memory, because it is the most power-consuming unit. All of these factors together determine the performance and power consumption of the MCU.†The MCU is responsible for signal control, so for it, the transmission efficiency of the signal data is very critical. . What determines the efficiency of signal data transmission is the architecture of the device. Bezemer emphasizes: "We are the largest supplier of ARM 7 core processors, which is enough to prove that the architecture design of our devices is very successful. And our development tools, software and service support are also guaranteed. MCU products are an important factor in achieving differentiated competitiveness."
Take the NXP LPC11A00 as an example. The resource configuration is the Cortex-M050MHz core, but because of the different configuration of the device in terms of storage, serial interface, and analog subsystem, it can be compared with other similar core MCUs. There is a big difference. The LPC11A00 is the industry's only true EEPROM with 32KB of flash memory, 8KB of SRAM and 4KB of EEPROM. It also includes a 32-bit integer divider and an I2C bus driver for ROM. In the analog subsystem, 8ch is also included. /10-bit ADC, 10-bit DAC, analog comparator, on-chip temperature sensor, on-chip voltage reference, and UVLO (Undervoltage Lockout).
Similarly, NXP's new Cortex-M4-based LPC4300 is also unique in its device architecture, making it ideal for motor control, solar inverters, digital power and audio. The dual-core architecture of the Cortex-M4+Cortex-M0 used in the LPC4300 is designed to reduce the bandwidth consumption of the Cortex-M4, allowing the core to concentrate on digital computing in digital signal control applications while leveraging large data transmission and I/O processing tasks. Hand it over to the M0 kernel for processing. This dual-core architecture and AHB bus matrix greatly enhances device performance and efficiency, allowing both dual cores to operate at 204MHz. Bezemer said: "This architecture is similar to the MCU + DSP system. Now, adding DSP functions to the MCU and adding MCU functions to the DSP processor is the trend."
NXP has developed a new peripheral interface IP: SPI Flash Interface Technology (SPIFI), which is a highlight of the company's Cortex-M3 MCU and adopted by the LPC1800. The external serial flash memory can be mapped to the MCU memory through SPIFI, so that the on-chip memory read effect can be realized. Bezemer said: "SPIFI provides designers with an innovative solution that simplifies configuration, reduces package size, reduces onboard space, and saves system cost while maintaining system performance. The key is that compared to on-chip flash External flash memory costs are much lower, and this way you can transfer flash and RAM data without CPU intervention."
The above emphasis is on the difference in hardware design. In fact, software support is also very important. NXP offers the emWin graphics library software developed by SEGGER, Germany, free of charge to all of its LPC MCU customers (this software is compatible with single-tasking and multi-tasking operating environments). Since NXP's MCUs all integrate LCD controllers, UI design can be separated from firmware development after emWin. The basic UI design can be implemented using stand-alone tools while firmware is being developed to increase the design speed of LCD applications. In addition, the development of MCUs based on Cortex-M0 and M0+ like NXP is also based on the Shanghai R&D Center. This kind of product based on local design to provide local customers is also very important, because then they will go from the local All over China, tap more market demand and seek more cooperation with local IDH.
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