Summary
Texas Instruments' ultra-low-power miniDSP audio Codec integrates a miniDSP core to deliver high-performance voice and music processing for battery-powered portable products with low-power operation. AdapTIveFiltering is an important feature of miniDSP. This article details the use of the function and considerations, and gives sample code for reference.
1 Introduction to miniDSP Codec
Texas Instruments' embedded miniDSP-based audio codec (miniDSP Codec) provides a powerful, flexible, low-power DSP engine for consumer electronics applications based on common audio codecs. The need for sound quality and sound effects.
The miniDSP's core is fully programmable and supports many proprietary algorithms for recording and playback. For example: MulTI-Band EqualizaTIon, Dynamic Noise Filter, Echo CancellaTIon, etc. The miniDSP Codec has excellent power management functions, while providing powerful audio processing capabilities while taking into account low power consumption. It is ideal for battery-powered portable applications such as smartphones, multimedia players, navigators, and electronic photo frames.
TLV320AIC3254 (referred to as AIC3254) is a typical device of miniDSP Codec. This article will analyze based on this device. Other miniDSP Codecs have similar architecture, features, and usage. Please refer to the device manual of the corresponding product for details.
1.1 miniDSP Codec architecture
Taking AIC3254 as an example, the miniDSP Codec integrates two miniDSP cores. As shown in Figure 1, miniDSP-A is located in the ADC signal path and is mainly responsible for digital audio stream processing after ADC sampling. The miniDSP-D is located on the DAC path and is primarily responsible for digital audio stream processing of the I2S bus input. An interconnected internal data bus between miniDSP-A and miniDSP-D can be used for data exchange and shared code space.
Figure 1. MiniDSP audio Codec internal simplified block diagram
In addition to Audio Codec, some ADCs and DACs also have a miniDSP core. Some of the content described in this article also applies to this type of device. Please refer to the manual of the corresponding device for details.
1.2 miniDSP memory architecture and register address
miniDSP-A and D each have their own independent memory space. Each DSP's memory is divided into three types: instruction memory, data RAM, and coefficient RAM.
• Instruction memory is used to store the running instructions and programs of the miniDSP.
• Data memory is used to temporarily store temporary data such as the operation results of the miniDSP runtime.
• The coefficient memory is used to store parameter data for controls such as miniDSP sound effects and gains.
Both the instruction memory and the coefficient memory can be read and written by the mapped I2C or SPI address. When Codec is powered up, the master chip needs to download the miniDSP program to the instruction memory and coefficient memory for operation via the I2C or SPI interface. Take TLV320AIC3254 as an example, the register map address and function of instruction memory and coefficient memory are shown in Table 1:
Table 1. TLV320AIC3254 Memory Architecture and Register Addresses
From the register map address, the coefficient memory controls of miniDSP-A and miniDSP-D are equally divided into two blocks: Buffer-A and Buffer-B. When the Adaptive Filtering function is turned off, Buffer-A and Buffer-B are a whole, continuous storage space. When the Adaptive Filtering feature is turned on, the contents of the two Buffers are fully synchronized and backed up. This memory architecture is the foundation of the Adaptive Filtering feature.
note:
It is recommended to turn off this feature when the user does not require the Adaptive Filtering feature. Coefficient of memory (Coefficent
RAM) will not divide Buffer-A and Buffer-B. Can provide more than double the coefficient of memory for users to use.
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